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400G OSFP to 2x200G QSFP56 AOC Breakout Cable

Ascent’s 400G OSFP product is an OSFP to 2x QSFP56, 400Gb/s to 2 x 200Gb/s Active Optical Breakout Cable (AOC) designed for connecting Mellanox NDR switch with OSFP cage to legacy 2 Mellanox HDR switch/HCA QSFP56 cages. The cable is compliant with SFF-8665 for the QSFP56 pluggable solution. It provides connectivity between system units with a OSFP 400Gb/s connector on one side and two separate QSFP56 200Gb/s connectors on the other side, such as a switch and two servers. The cable connects data signals from each of the 8 MMF (Multi Mode Fiber) pairs on the single OSFP end to the four pairs of each of the QSFP56 multiport ends. It supports 53.125Gb/s per channel. Ascent’s active fiber cable solutions provide power-efficient connectivity for data center interconnects. It enables higher port bandwidth, density and configurability at a low cost, and reduced power requirement in the data centers. four-channel full-duplex active optical cable. The OSFP cable has low power dissipation and 8x50g PAM VCSEL/PIN photo detector. Its operating case temperature is 0°C~70°C.

·       Four-Channel full-Duplex active optical cable from OSFP to two QSFP56 cable end

·       Supports 53.125Gb/s per channel

·       Low Power Dissipation, Max 8W on OSFP end, Max. 4W on QSFP56 end.

·       8x50G PAM4 VCSEL/PIN photo detector

·       Operating Case Temperature: 0°C ~70

·       Compliant to Class 1M Laser Safety

·       OSFP form factor compliance to

n       Compliant to OSFP Rev. 5.0

n       SFF-8679 electrical interface

n       SFF-8661 Pluggable Module

n       CMIS Rev. 4.0 Management Interface

n       IEEE 802.3cd: Physical Layer Specifications and Management Parameters

·       QSFP form factor compliance to

n       SFF-8636 Management Interface

n       IEEE 802.3cd: Physical Layer Specifications and Management Parameters

Absolute Maximum Parameters

Exceeding the limits below may damage the active optical cable permanently.

Parameter

Symbol

Min.

Typ.

Max.

Unit

Ref

Maximum Supply Voltage

TCC

-0.5


3.6

°C


Storage Temperature

Vsto

-40


85

°C


Case Operating Temperature

TOP_1

0


60

°C

12

Top_2

0


70

°C

2

Relative Humidity

RH

5


85

%


DDMI temperature reading is measured by the position of Top_1

Case operating temperature definition:

Top view of module:

image.png

                                         Top View of Module

 

Bottom view of module:
image.png

                                      Bottom View of Module

Combination view of module:
image.png

                                                       
                                               image.png

                                 Combination View of Module

             PARAMETERS

Parameter

Symbol

Min.

Typ.

Max.

Unit

Ref

Supply Voltage

Vcc



12

W


Power Consumption

PCon



3.63

A


Bit Rate (PAM4)BR

BR


26.5625


GBd

1

Bit Rate (NRZ)

BR


25.78125


Gbps


Pre-FEC Bit Error Ratio (PAM4)

BER



2.4x10-4


2

Post-FEC Bit Error Ratio (PAM4)

BER



10-12



Pre-FEC Bit Error Ratio (NRZ)

BER



5x10-5



Post-FEC Bit Error Ratio (NRZ)

BER



10-12



Center Wavelength

λc

840


868

nm

3

Beam Divergence Angle



23


°


Number of Lanes







Management Interface


Serial, I2C-based, maximum frequency 400 kHz


4

Logic Input Voltage High

Vih

2


Vcc+0.3

V


Logic Input Voltage Low

Vil

-0.3


0.8

V


       ① Single lane

       ② PRBS31Q test pattern is used.

       ③ As defined by IEEE Std. 802.3bs /D3.5

       ④ As defined by SFF-8636

             Electrical Characteristics for OSFP

Parameter

Symbol

Min.

Typ.

Max.

Unit

Ref

Transmitter at TP1a

AC Common-Mode Output Voltage (RMS)




17.5

mV


Differential Peak-to-Peak Output Voltage (Transmitter

Disabled)




35

mV


Differential Peak-to-Peak Output Voltage (Transmitter

Enabled)




880

mV


Eye Symmetry Mask Width

ESMW


0.22


UI


Eye Height, Differential

EH

32



mV


Differential Output Return Loss


See Eq. 1



Common to Differential Mode

Conversion Return Loss


See Eq. 2



Differential Termination Mismatch


10



%


Transition Time (20% To 80%)

Tr, Tf

10



ps


Receiver At TP4

Far-End Eye height, Differential


30





Far-End Pre-Cursor ISI Ratio


-4.5


2.5

%


Differential Output Return Loss

λ

See Eq. 1



Common to Differential Mode Conversion Return Loss


See Eq. 2




Differential Termination Mismatch


10



%


Transition Time (20% To 80%)

Tr, Tf

10



ps


DC Common Mode Voltage


-350


2850

mV


image.png

where

f is the frequency in GHz, RLdc is the CAUI-4 Chip-to-module input differential to common mode input return loss

image.png   

where

f is the frequency in GHz, RLdc is the CAUI-4 Chip-to-module input differential to common mode input return loss

           Electrical Characteristics for QSFP

Parameter

Symbol

Min.

Typ.

Max.

Unit

Ref

Transmitter at TP1a

AC Common-Mode Output Voltage (RMS)




17.5

mV


Differential Peak-to-Peak Output Voltage (Transmitter

Disabled)




35

mV


Differential Peak-to-Peak Output Voltage (Transmitter

Enabled)




880

mV


Eye Symmetry Mask Width

ESMW


0.22


UI


Eye Height, Differential

EH

32



mV


Differential Output Return Loss


See Eq. 1



Common to Differential Mode

Conversion Return Loss


See Eq. 2



Differential Termination Mismatch


10



%


Transition Time (20% To 80%)

Tr, Tf

10



ps


Receiver At TP4

Far-End Eye height, Differential


30





Far-End Pre-Cursor ISI Ratio


-4.5


2.5

%


Differential Output Return Loss

λ

See Eq. 1



Common to Differential Mode Conversion Return Loss


See Eq. 2




Differential Termination Mismatch


10



%


Transition Time (20% To 80%)

Tr, Tf

10



ps


DC Common Mode Voltage


-350


2850

mV


image.png

where

f is the frequency in GHz, RLdc is the CAUI-4 Chip-to-module input differential to common mode input return loss

image.png

where

f is the frequency in GHz, RLdc is the CAUI-4 Chip-to-module input differential to common mode input return loss

General Product Characteristics

Parameter

Value

Unit

Comments

Module Form Factor

OSFP and QSFP


Module Form Factor

Number Of Lanes

8 TX and 8 RX



Maximum Aggregate Data Rate

425(OSFP) 212.5(QSFP)

Gb/s


Maximum Data Rate Per Lane

53.125

Gb/s


Standard Cable Lengths

3, 5, 7,10, 15, 20

m

Other lengths may be

available upon

request

Protocols Supported

InfiniBand, Ethernet



Electrical Interface And Pinout

60-pin edge connector

(OSFP) 38-pin edge

connector (QSFP56)


Pin-out as defined by

OSFP Rev. 5.0 & QSFP

SFF8679

Standard Optical Cable Type

Multimode OM3(≤70m)

Multimode OM4(<100m)



Maximum Power Consumption Per End

8 (OSFP) and 4 (QSFP56)

W

Varies with output

voltage swing and

pre-emphasis settings

Management Interface

Serial, I2C-based, 400

kHz maximum frequency


As defined by CMIS

Rev 4.0

The force specification for AOC is in the list below:

Parameter

Min.

Max.

Unit.

Comments.

Module Insertion


40 (OSFP)

40 (QSFP56)

N


Module Extraction


30 (OSFP)

30 (QSFP56)

N


Module Retention

125 (OSFP) 90 (QSFP56)


N


Insertion And Removal Cycles

50


Cycle


Cable Outer Diameter

2.9

3.1

mm


Fiber Cable Material

Aqua, OFNP, Corning fiber


 

        Pin Desciptions (compliant OSFP Rev. 5.0)

Pin

Symbol

Description

Plug Sequence

1

GND

Ground

1

2

TX2p

Transmitter Data Non-Inverted

3

3

TX2n

Transmitter Data Inverted

3

4

GND

Ground

1

5

TX4p

Transmitter Data Non-Inverted

3

6

TX4n

Transmitter Data Inverted

3

7

GND

Ground

1

8

TX6p

Transmitter Data Non-Inverted

3

9

TX6n

Transmitter Data Inverted

3

10

GND

Ground

1

11

TX8p

Transmitter Data Non-Inverted

3

12

TX8n

Transmitter Data Inverted

3

13

GND

Ground

1

14

SCL

2-wire Serial interface clock

3

15

VCC

+3.3V Power supply

2

16

VCC

+3.3V Power supply

2

17

LPWn/PRSn

Low-Power Mode / Module Present

3

18

GND

Ground

1

19

RX7n

Receiver Data Inverted

3

20

RX7p

Receiver Data Non-Inverted

3

21

GND

Ground

1

22

RX5n

Receiver Data Inverted

3

23

RX5p

Receiver Data Non-Inverted

3

24

GND

Ground

1

25

RX3n

Receiver Data Inverted

3

26

RX3p

Receiver Data Non-Inverted

3

27

GND

Ground

1

28

RX1n

Receiver Data Inverted

3

29

RX1p

Receiver Data Non-Inverted

3

30

GND

Ground

1

31

GND

Ground

1

32

RX2p

Receiver Data Non-Inverted

3

33

RX2n

Receiver Data Inverted

3

34

GND

Ground

1

35

RX4p

Receiver Data Non-Inverted

3

36

RX4n

Receiver Data Inverted

3

37

GND

Ground

1

38

RX6p

Receiver Data Non-Inverted

3

39

RX6n

Receiver Data Inverted

3

40

GND

Ground

1

41

RX8p

Receiver Data Non-Inverted

3

42

RX8n

Receiver Data Inverted

3

43

GND

Ground

1

44

INT/RSTn

Module Interrupt / Module Reset

3

45

VCC

+3.3V Power

2

46

VCC

+3.3V Power

2

47

SDA

2-wire Serial interface data

3

48

GND

Ground

1

49

TX7n

Transmitter Data Inverted

3

50

TX7p

Transmitter Data Non-Inverted

3

51

GND

Ground

1

52

TX5n

Transmitter Data Inverted

3

53

TX5p

Transmitter Data Non-Inverted

3

54

GND

Ground

1

55

TX3n

Transmitter Data Inverted

3

56

TX3p

Transmitter Data Non-Inverted

3

57

GND

Ground

1

58

TX1n

Transmitter Data Inverted

3

59

TX1p

Transmitter Data Non-Inverted

3

60

GND

Ground

1

Name

Direction

Description

TX[8:1]p

input

Transmit differential pairs from host to module.

TX[8:1]n

input


RX[8:1]p

output

Receiver differential pairs from module to host.

RX[8:1]n

output


SCL

bidir

2-wire serial clock signal. Requires pull-up resistor to 3.3V on host.

SDA

bidir

2-wire serial data signal. Requires pull-up resistor to 3.3V on host.

LPWn/PRSn

bidir

Multi-level signal for low power control from host to module and module

presence indication from module to host. This signal requires the circuit

as described in Section 11.5.3

INT/RSTn

bidir

Multi-level signal for interrupt request from module to host and reset

control from host to module. This signal requires the circuit as described

in Section 11.5.2

VCC

power

3.3V power for module.

GND

ground

Module Ground. Logic and power return path.


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                                                                                       Mechanical Outline
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                                                                             OSFP   

image.png

                                                                      QSFP 

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